SPI interface paper published in e-Prime

Our paper, 32-bit SPI interface design between Texas Instruments MCU and Intel FPGA enabling real-time intelligent control applications, is now published in e-Prime – Nexus of Electrical, Electronic, and Intelligent Engineering.

The work connects a TI TMS320F28335 microcontroller and an Intel Altera Cyclone V FPGA over a full-duplex SPI link, with a handshake-based clock-domain-crossing design on the FPGA side. In testing it ran error-free at 9.375 MHz with 7.64 Mbps of effective throughput, and with an RNN-based inverter controller as the workload, end-to-end latency was a deterministic three SPI frames, about 21.9 µs.

Read it here: doi:10.1016/j.eprime.2026.201246.